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• #3849 S_x96x_S addikt

  Új Válasz 2020-09-18 13:44:59 #3849

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  addikt

  Linux 5.10 To Support AMD SME Hardware-Enforced Cache Coherency

  "The new feature is supporting hardware-enforced cache coherency and is coming to Linux 5.10 via patches that have been worked on by an Oracle engineer. It's not clear what AMD EPYC CPUs support this hardware-enforced cache coherency as it's checking on a CPUID bit but given the timing it wouldn't be surprising if this is for the upcoming AMD EPYC Zen 3 processors.
  
  On processors supporting this CPUID feature, there is guaranteed coherency between the encrypted/unencrypted mappings of the same physical page. Thus with this AMD hardware-enforced cache coherency there is no need to flush the page from all CPU caches in the system before changing the value of the C-bit for a page. Avoiding unnecessary cache flushes should help with performance albeit the patches don't detail any specific advantages and I haven't been able to find any public documentation this specific SME feature."

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