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  • stratova

    veterán

    válasz leviske #12769 üzenetére

    Itt 24. oldal
    Oliverda :)

    Itt van még két cikk egy kicsit érthetőbben.

    Az első bekezdés írja le a lényegét talán e legrövidebben:
    Yesterday’s blog entry discussed FinFETs as a way to build advanced-process transistors with reduced leakage and improved performance. (See “Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part 1)“.) There’s another way to eliminate the unwanted silicon in the FET channel and that’s by making that part of the channel “go away.” If you make the channel as thin as 2nm, there simply won’t be a short-channel leakage path said Hu. Even if you can’t get the channel to be as thin as 2nm, you end up reducing leakage by an order of magnitude for every 1nm of channel thickness reduction. This ultra-thin channel approach achieves the same objective as the FinFET approach: it reduces the amount of silicon in the FET channel and, in particular, it eliminates any silicon far from the gate. That’s the silicon that permits leakage.

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