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• #1 S_x96x_S addikt

  Új Válasz 2022-08-04 01:52:14 #1

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  S_x96x_S

  addikt

  és a core cégek külön nyilatkoztban is jelezték, hogy ez a jövő ..

  August 2, 2022:
  CXL™ Consortium Members – Statements of Support for CXL 3.0 Specification

  AMD
  “CXL has always been about opening up possibilities for dynamic and flexible infrastructure. CXL is fundamental to accelerating modern workload types, each with their own coherency, latency, and pooling requirements. CXL 3.0 brings us closer to truly effective heterogeneous computing that maximizes performance and allows us to deliver the value of flexible compute to our customers in enterprise, cloud and edge.”
  Robert Hormuth, corporate vice president, Data Center Solutions Group, AMD

  Intel
  “Intel is excited to see the CXL Consortium launching the CXL 3.0 Specification, which will open many new innovative usages around disaggregated compute architectures with pooled and shared resources such as memory and accelerators at the Rack level and beyond. CXL has become the focal point for the advancement of high-speed IO with coherency and memory enhancements and Intel remains
  committed to working with the industry to continue to drive the CXL technology through the CXL Consortium.”
  Dr. Debendra Das Sharma, senior fellow, and co-GM of Memory and I/O Technologies, Intel Corporation and CXL Consortium Technical Task Force Co-Chair

  Arm
  “Standardization remains critical to delivering the compute required for increasingly complex datacenter workloads. Arm’s collaboration with consortium members on the CXL 3.0 specification will enable more performance and flexibility, allowing customers to build and deploy scalable, heterogeneous systems
  that best match their needs.”
  Andy Rose, chief system architect and fellow, Architecture and Technology Group, Arm

  Viszont az nVidia nincs az eredeti PDF listában.
  annak ellenére, hogy a konzorcium tagja ..
  Amúgy egy picit kritikusak a CXL-lel és van nekik saját NVLink-jük.

  Blocks & Files: And CXL?
  (nvidia) Deierling: “One of the things we’re looking at is CXL. NVLink is very much like CXL. And I think we won’t be disadvantaged. You know, we’ll support CXL when it’s available. We look at CXL as just the next generation of PCIe. Certainly today with PCIe, it’s one of the areas where we connect. And, you know, frankly, it slows us down.”
  ...
  A PCIe problem is tail latencies, as he explained. “RDMA, the remote direct memory access capability, needs really low latency hardware offload congestion management. [That’s] because one of the challenges here is that if you have memory, you simply can’t live with long tail latencies, where every once in a while, your access takes many, many hundreds of microseconds versus on average, microseconds.

  https://blocksandfiles.com/2022/07/13/nvidia-thoughts-on-composability-tail-latency-limits-cxl/

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