CPU/PCI-E Clock Driving Control
The default setting is 800mv, with a range of voltage control offered between 700mv-1000mv. As this is a differential amplifier circuit, increasing voltage may actually decrease the clock signal accuracy due to increased power supply noise. Differential circuits are used in preference to single ended circuits because of their noise rejection and low voltage operating capabilities. Increasing voltage to these circuits in turn increases "nasties" such as overshoot and output clock signal jitter. This in turn counteracts the benefits of using a differential amplifier in the first place. We did experiment with various levels of overvoltage and found no gains in stability whatsoever, further cementing our beliefs that more is not always better.
CPU Clock Skew Control and (G)MCH Clock Skew Control
These two clock skew settings are directly related to the voltage control circuit above. They control the PLL output to both the CPU and Northbridge. Again, as a differential amplifier is used, the level of offset required should never exceed 150ps (Pico seconds) of skew to either the CPU or Northbridge reference clocks. At most, PLL circuits such as these should be "good enough" to retain a jitter level of around 150-200ps (lower is better). For those wishing to experiment, adjustments in the range of 0-200ps are of interest for both of the clock skew functions. As a rule, start with the lowest voltage possible, tune either skew setting, and then monitor for effects if any.
FSB Overvoltage Control
This voltage setting is more commonly known as VTT. Default is 1.10V, with a maximum of 1.41V available. This voltage is critical for quad-core overclocking. 400FSB will require 1.41V right off the bat if stability is desired. (Ed: When isn't that the goal?) Unfortunately, we have no direct control over GTL (Gunning Transceiver Logic) reference values, which are locked at 67% of VTT for CPU die 1 and 63% of VTT for CPU die 2. On a top-end board like this, we had expected to find GTL adjustments, which can be crucial for finding quad-core CPU stability at high FSB speeds.
FSB Overvoltage Control
This voltage setting is more commonly known as VTT. Default is 1.10V, with a maximum of 1.41V available. This voltage is critical for quad-core overclocking. 400FSB will require 1.41V right off the bat if stability is desired. (Ed: When isn't that the goal?) Unfortunately, we have no direct control over GTL (Gunning Transceiver Logic) reference values, which are locked at 67% of VTT for CPU die 1 and 63% of VTT for CPU die 2. On a top-end board like this, we had expected to find GTL adjustments, which can be crucial for finding quad-core CPU stability at high FSB speeds
Lefordítaná valaki nagy vonalakban? Csak pár mondat az egész...
Akinek DDR3 verziója van egy kis segítség a BIOS-hoz:
Gigabyte GA-X48T-DQ6 Bios Settings @ 450FSB
Robust Graphics Booster Turbo
CPU Clock Ratio 8x (Q6600/QX6800) 9x (QX9650)
CPU Frequency 450FSB
CPU Host Clock Control Enabled
CPU Host Frequency (MHz) 450
PCI Express Frequency (MHz) 100
C.I.A.2 Disabled
Performance Enhanced With Extreme
System Memory Multiplier 4.00B
DRAM Timing Selectable Manual
CAS Latency Time 8
DRAM RAS# to CAS# Delay 8
DRAM RAS# Precharge 8
Precharge delay (tRAS) 21
ACT to ACT Delay (tRRD) 4
Rank Write To READ Delay 8
Write To Precharge Delay 12
Refresh to ACT Delay 60
Read to Precharge Delay 6
Static tRead Value 7 or 8 depending on stability requirements
(7 = higher performance)
Static tRead Phase Adjust Auto
Command Rate 1N
CPU/PCIEX Clock Driving 800mV
CPU Clock Skew Control Normal
(G)MCH Clock Skew Control Normal
System Voltage Control Manual
DDR3 Overvoltage Control (+)0.55
PCI-E Overvoltage Control Normal
FSB Overvoltage Control (+)0.35
(G)MCH Overvoltage Control (+)0.25V
Loadline Calibration Disabled
CPU Voltage Control Dependant on Processor
Szakmai kérdésekkel ne pü-ben keress....használd a megfelelő topikot! A 4890 CF tesztet amit elkezdtem, nem fogom befejezni. Majd megcsinálja más. A meglévő nVidia-s cikkeimet pedig törölni fogom.